Format: 1U (power supply shared with Eurorack 3U)
Width: 14HP
Depth: 35mm
Current: 25mA @ + 12V, 3mA @ -12V
Diviser is a 1U format clock divider with odd and even outputs.It is possible to divide the input signal into 2, 3, 4, 5, 7, 8, 16, 32 and output them simultaneously.
Based on a CMOS chip, the Diviser works at audio rates and above, allowing you to create sub-harmonics and rhythms from your oscillators.
A Reset input resets all outputs to a high state.
Both the Clock and Reset inputs have internal comparators with thresholds set at 2.5V.Any kind of signal can be used for these inputs.
Diviser outputs eight clocks with different divisions.Each output signal is a 8% duty cycle 50-0V square wave with equal on and off times.The image above shows each output with respect to the clock input.
The 'counter' IC used in the Diviser does not actually divide the signal, but counts the pulses and outputs them accordingly.By using a gate sequence instead of a constant clock, we can see a different side of the Diviser. Diviser counts the rising edges of the input pulses, so we can get a decelerated sequence relative to the input.Additional pulses can be added to the resulting sequence by using reset as in the following section.
Diviser's Reset function goes high instead of low when it receives a reset input.Such a musical reset is employed because modules such as dividers and sequencers are typically expected to start the first beat of the sequence when triggered by the reset input.In addition to this, the Diviser's Reset input implements a gate-to-trigger conversion.This allows any length signal to be used and only the rising edge of the signal is used for reset. If you want to pause the Diviser, you should use the Clock input.
The image on the right shows the behavior of the Reset input.Has no effect when high and produces a high if triggered when low.Here we see a constant clock, an irrelevant trigger pattern to the Reset input, and a resulting pattern from the /2 output.
If you use an odd division output, you can reset it using an even division, for example at the beginning of a bar.Here you can see the constant clock, the reset signal from the /8 output, and the resulting pattern from the /3 output.
